1. Field of the Invention
The invention relates to a semiconductor device and a manufacturing method thereof, particularly, a semiconductor device having penetrating electrodes and a manufacturing method thereof.
2. Description of the Related Art
CSP (Chip Size Package) has received attention in recent years as a new packaging technology. The CSP means a small package having almost the same outside dimensions as those of a semiconductor die packaged in it.
Conventionally, BGA (ball grip array) type semiconductor devices having penetrating electrodes have been known as a kind of CSP. This BGA type semiconductor device has penetrating electrodes penetrating a semiconductor substrate and connected with pad electrodes formed on a front surface of the substrate. In this semiconductor device, a plurality of ball-shaped conductive terminals made of metal such as solder is arrayed in a grid pattern on a back surface, and electrically connected with the penetrating electrodes through wiring layers. When this semiconductor device is mounted on electronic equipment, the conductive terminals are connected to a circuit board, for example, wiring patterns on a printed circuit board.
Such a BGA type semiconductor device has advantages in providing a large number of conductive terminals and in reducing size over other CSP type semiconductor devices such as SOP (Small Outline Package) and QFP (Quad Flat Package), which have lead pins protruding from their sides.
FIG. 19 is a cross-sectional view of a penetrating electrode portion of the BGA type semiconductor device having the penetrating electrodes. A pad electrode 11 is formed on a front surface of a semiconductor substrate 10 formed of silicon (Si) and the like with an interlayer insulation film 12 therebetween. Furthermore, a support body 13 such as a glass substrate is attached to the front surface of the semiconductor substrate 10 with a resin layer 14 therebetween. Furthermore, a via hole 16 penetrating the semiconductor substrate 10 to the pad electrode 11 is formed. An insulation film 17 formed of a silicon oxide film (SiO2 film) or a silicon nitride film (SiN film) is formed on a sidewall of the via hole 16 and on a back surface of the semiconductor substrate 10.
Furthermore, a barrier seed layer 20 connected with the pad electrode 11 and a penetrating electrode 21 are formed in the via hole 16. A wiring layer 22 connected with the penetrating electrode 21 extends over the back surface of the semiconductor substrate 10. Furthermore, a protection layer 23 formed of a solder resist is formed covering the penetrating electrode 21, the wiring layer 22 and the insulation film 17 on the back surface of the semiconductor substrate 10. An opening is formed in the protection layer 23 on the wiring layer 22, and a ball-shaped conductive terminal 24 connected with the wiring layer 22 through this opening is formed. The relevant technology is disclosed in the Japanese Patent Application Publication No. 2003-309221.
However, in the described BGA type semiconductor device, when a thermal cycle test is performed as one of endurance tests, mainly, the protection film 23 peels in four corner portions of the semiconductor device, i.e., corner portions of the semiconductor substrate 10 after dicing, or both the protection film 23 and the insulation film 17 thereunder peel from the semiconductor substrate 10, as shown in FIG. 20, causing a problem of lowering reliability of the semiconductor device. The cause of this problem is presumably that the protection film 23 and the insulation film 17 thereunder peel when applied with thermal stress beyond endurance during the thermal cycle test of the semiconductor device.